Field of the Invention
The present invention relates to a nitride semiconductor light emitting element mounted on a mounting substrate via a metal bump and a manufacturing technique of the nitride semiconductor light emitting element.
Description of the Related Art
Nitride semiconductors are generally used for light emitting elements such as light emitting diodes (LED) and laser diodes (LD), light receiving elements such as solar cells and light sensors, and electronic devices such as transistors and power devices. Especially, the light emitting diode (nitride semiconductor light emitting element) using the nitride semiconductor has been widely employed in various light sources for backlight, illumination, traffic signals, large displays and the like.
Examples of a method of mounting such nitride semiconductor light emitting element on the mounting substrate include a flip-chip mounting method in which a semiconductor layer of the light emitting element is oriented downward and a p-side electrode and an n-side electrode of the light emitting element are opposed to each other and connected to wiring electrodes on the mounting substrate.
The nitride semiconductor light emitting element used in the flip-chip mounting method includes an n-type nitride semiconductor layer and a p-type nitride semiconductor layer, each containing an active layer, that are formed on a sapphire substrate or the like, and a p-side electrode and an n-side electrode that are connected to the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively, and are formed on a same plane side as the substrate. The nitride semiconductor light emitting element can be mounted on the mounting substrate by orienting the p-type nitride semiconductor layer and the n-type nitride semiconductor layer downward to allow the p-side electrode and the n-side electrode to be opposed to the wiring electrodes on the mounting substrate and connecting the electrodes to the wiring electrodes through metal bumps by pressing contact.
The method disclosed in JP-A-2004-153110 discloses, as a method of forming metal bumps in the nitride semiconductor light emitting element, a method in which a resist pattern that masks a p-side electrode and an n-side electrode as pad electrodes made of a metal film, except for upper surfaces of both the electrodes, is formed and a metal bump layer is laminated by electroless plating and then the resist pattern is released.
According to another method disclosed in JP-A-2005-79551, a p-side electrode and an n-side electrode each are formed of a metal film, a metal layer is laminated on the entire surface of a light emitting element and a resist pattern having openings above both the electrodes is formed. Using the above-mentioned metal layer as a seed electrode, a metal bump layer is formed by electrolytic plating and then releasing a resist pattern and removing the metal layer except for the electrode surface on which the metal bump layer is laminated.
A method of manufacturing the nitride semiconductor light emitting element having metal bumps according to the prior art (for example, JP-A-2005-79551) will be described with reference to FIG. 15. FIG. 15 are schematic sectional views for describing a manufacturing process of the semiconductor light emitting element having the metal bumps according to the prior art. As shown in FIG. 15, the process includes following steps of (a) forming electrodes on a GaN-based light emitting element wafer, (b) forming insulating films, (c) forming a metal layer on an entire surface, (d) resist patterning, (e) forming bumps by electroplating, (f) removing resists, (g) removing the metal layer, (h) bonding to a submount member-side wafer and (i) separating into light emitting element units.
First, a plurality of light emitting element units 121 each including an n-side electrode 103 and a p-side electrode 104 are formed on a substantial entire surface of a wafer 120 formed by growing a GaN-based compound semiconductor on a surface of a sapphire substrate (not shown) in a matrix (FIG. 15A), and insulating films 122 formed of SiO2 films are formed on portions other than portions where the bumps for the n-side electrode 103 and the p-side electrode 104 are formed (FIG. 15B).
Next, a flat metal layer 105 that is made of an Au/Ti alloy and is electrically connected to the n-side electrode 103 and the p-side electrode 104 is formed on the entire surface of the wafer 120 (FIG. 15C). The metal layer 105 is formed so as to have a thickness of 0.5 to 3 μm by vapor deposition, sputtering or the like.
By forming resists 123 on the metal layer 105 (FIG. 15D) and applying electroplating thereto, bumps 106, 107 are formed on the metal layer 105 (FIG. 15E).
By removing the resists 123 (FIG. 15F) and further removing exposed portions of the metal layer 105, there is obtained a light emitting element-side wafer in which the light emitting element units 121 each having the bump 106 in electrical connection with the n-side electrode 103 and the bump 107 in electrical connection with the p-side electrode 104 are formed in a matrix (FIG. 15G).
Patent document 1: JP-A-2004-153110
Patent document 2: JP-A-2005-79551
However, according to the method of forming the metal bumps using electroless plating as described in Patent document 1 (JP-A-2004-153110), it is difficult to stably form a thick metal bump. According to the method of forming the metal layer 105 by vapor deposition, sputtering or the like as described in Patent document 2 (JP-A-2005-79551), it was difficult to form the flat metal layer 105. In addition, in the step of removing the exposed portions of the metal layer 105, there was a possibility that the metal layer 105 cannot be sufficiently removed to case leakage between the electrodes.